DFT Digest

You are browsing the archives of 2006 January.

As I was in the middle of being flogged into a tapeout frenzy, I didn’t get the chance to visit ITC in November. But I guess there always must be some excuse, because I haven’t been to ITC since ‘97 or ‘98, when I was a full-on test engineer. Just the same, I [...]

What is ‘delay testing’? Some call it at-speed scan or ATPG. But the bottom line is that this technique involves loading scan data, parallel-clocking it twice (at functional speed – or faster), and shifting the result out of the chip.
First off – there are 2 kinds of delay test: Transition delay test and path [...]

So here it is, New Year’s day. No Rose Parade, no Rose Bowl – what’s a guy to do? Think about DFT? Why not? Today’s a good day to reflect upon what’s been done in the past, and what’s to become of the future. After all, this is the time of [...]