DFT Digest

You are browsing the archives of 2007 January.

Today I received an e-mail from Dr. Ben Bennetts, DFT Consultant (Semi-retired) with a great introduction to some ‘in-the-works‘ extensions to the IEEE 1149.1 test access standard, called IJTAG (Internal JTAG) and SJTAG (System JTAG).
The Internal JTAG effort seeks to standardize the access to ‘internal instruments’ of all sorts that may reside on a single [...]

I’m having the hardest time ever keeping up on the blog this month. Call it an extended holiday hangover, crunch time at work, short spates of illness, whatever. I hope February sparks up here for me.
Last month I started writing about testability or DFT planning. Of course, I took the easiest route [...]

Very interesting article over at embedded.com, by Tom Jackson of Cadence Design Systems. He makes some excellent points about the necessity of being aware of power consumption throughout the design flow, including the insertion of test structures. But “Design-With-Test”? What he’s describing is what I thought was termed “Power Aware Design and [...]

I mentioned in another post just after ITC 2006, that I’d met Ben Bennetts for the first time. We had breakfast, and talked a bit about this blog I was trying to start up. It was an introductory conversation, but secretly, I was hoping to eventually convince him to work up some material [...]

Just tripped on this item while researching for a future post… and apparently it’s fresh:
T.W. Williams, a Synopsys Fellow and true pioneer of modern test methods has been given the European Design Automation Association (EDAA) Lifetime Achievement Award for 2007. The honor is “given to individuals who made outstanding contributions to the state [...]