Archive for March 2007

You are browsing the archives of 2007 March.

Design-for-Test News

Over there to the right of this web page, you’ll see a link named ‘DFT in the News‘ to a page that I keep at blogspot. Its www.dftdigest.blogspot.com.
Well, I couldn’t figure out how to maintain two pages of posts, sorted from newest to oldest, so I just started another blog to contain just links [...]

NoC: Network on Chip – DFT beyond the SoC

I’m learning new things every day. Just recently, a friend of mine asked if I’d like to review a few papers for this year’s ITC. Being a part of the organizing committee, her areas are microprocessor test, SoC test, and NoC test.
Feeling a bit ignorant, I asked, “uhh, what’s ‘NoC’?”. “Network on Chip” [...]

Uhhh… What’s the Fault Coverage?

Way back in the dark ages, we’d hand craft test patterns for our circuits. We would brainstorm corner cases, and even after we were done, we’d cook up even more patterns to cover odd defects in chips returned from customers. Now, that was living!
Then the logic simulator came to be, and on [...]