Archive for May 2007

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A Slightly New Look for DFT Digest…

Just in case you’re lurking about, and notice some small changes taking place in the look of this website, I should let you kow that I’m testing out a new WordPress theme, which is widget compatible (see the WordPress Codex if this doesn’t make any sense to you). So you might see things appearing [...]

Frequently Asked DFT Questions

From time to time, I go over to EDABoard, a fairly all-encompassing electronic design bulletin board site operated from Europe, and check out the ASIC design forum. It seems that design-for-test is a fairly popular topic [...]

2 weeks to Southwest DFT Conference

I received an e-mail today reminding me of the upcoming SW DFT Conference, sponsored by SiliconAid Solutions, to be held May 31st in Austin, TX. Pre-registration is free until May 25th. No word on what it would cost to register late – I think they make you buy lunch.
All kidding aside, I took [...]

May Newsletter at A.T.E. Solutions

Just a shout out to link buddy A.T.E. Solutions – the May 1 newsletter is now available to view (I assume it has been for over a week…) It’s the Design-for-Testability issue, and it has a couple of interesting board-centric DFT articles.  Go check it out.

VTS 2007 – May 6th in Berkely

And it’s May 7th – so I’m late. But not really, because all the action started today, beginning with a plenary session which includes a keynote address by Antun Domic of Synopsys, entitl;ed “New Role of Test in 45 Nanometer”, as well as one called “Roadmap of Design” by Gary Smith.
VLSI Test Symposium focuses [...]