DFT Digest

You are browsing the archives of 2007 June.

About once a month, Mentor publishes a little piece on their website called Test Talk, written by Al Crouch. This month’s edition, entitled ‘Outsourcing, the Scrabble Method’, is a Dilbertian look at outsourcing, and of course, has its DFT-related tie-in: weighted fault coverage and n-detect. Hmmm… what could weighted fault coverage and outsourcing [...]

I’ve been trying to put together some info about JTAG and boundary scan, but being a chip engineer, I’m having a hard time expanding my mind to the edges of the device lately. However, this item [...]

I was just sitting here waiting for a scope tool to draw a simple waveform on this gawdawful 93k ATE, and decided to surf the web a little – and ran across the following entry in Mike Santarini’s blog over at EDN. It seems CMP laid off Richard Goering from EETimes… does the EDA [...]

I mentioned in my previous post the fact that the design-for-test content was pretty much ITC warmed over. I’m not surprised, mind you. DAC really is more for the overall design & EDA community, whereas the focus of ITC is test. But I saw this article over at the Test & Measurement [...]

So, as I was saying, I wandered around DAC for a few hours on Wednesday, and it was fairly quiet, test-wise. Anything I saw there, I saw at ITC in October:
I listened to Tom Williams of Synopsys give a very quick talk on DFT at the submicron level, which, if you blinked, or got [...]