DFT Digest

I went down to San Diego yesterday to spend the day at DAC, and see if there was anything interesting on the DFT front. In one sentence, I can safely say that there was really nothing new… most of the conversation picked up was the same as it was in October at ITC.

Personally, I was able to make contact with some of the EDA vendors I work with, and see a few people I usually don’t see much of if I don’t go to DAC. I met, for the first time face to face, JL Gray, author of Cool Verification, the blog. Check his site out - actually most of the DAC coverage is at Verilab’s new website.

I also sat in on a Synopsys/ARM sponsored event on low-power design, which was interesting.

I’ll be writing some more focused posts about what I saw yesterday -stay tuned…

Cooley’s got his list. Gary Smith has his. And as expected, no real testability or test related suggestions. As the last year has unfolded, the one thing that has been consistently at the top of the news and discussion is DFM. And, of course, that’s the big push at DAC with everyone. Both Cooley and Smith are directing the masses toward ClearShape, the DFM company that appears to have the most promise.

Another just slightly less popular topic of conversation is low-power design, the subject of many talks, papers and technical sessions.

As far as testability goes, if you’re a full conference registrant, you’ll have the opportunity to listen to at least a few papers on low-power test compression, ATPG techniques to reduce IR-drop, etc. It’ll be interesting to see just how much meaningful conversation a ‘free-day only’ registrant will be able to pick up in the various booths of the vendors that offer test and testability tools.

I might head down there this afternoon and find out…