DFT Digest

You are browsing the archives of 2007 July.

More than once, I’ve had requests to address analog (or analogue, if you’re a Brit) testability in this blog. I barely touched on it back in December of last year, in this post. I briefly mentioned some things I’d dealt with many years ago. Thinking about it today, it sure doesn’t seem [...]

A few days ago I wrote a plaintive post about an article I came across somewhere out there on the net, with the title “Dot 6 Explained”. Amazingly enough, the author of that article, James Stanbridge of JTAG Technologies replied to my post corroborating the obvious fact that it had been ‘edited’, and agreed [...]

In a couple of previous posts, here, and here, I started discussing different design-for-test tools – you know, other than your run-of-the-mill ATPG and BIST tools. In the last post, I talked about a couple of tools that are targeted for the RTL domain. Now I’d like to mention some DFT-related products that [...]

just ran across the following article, “Dot 6 Explained” at the Components In Electronics website. I’m always interested in a good article on 1149.6 because it seems like a larger and larger percentage of interconnect is implemented with differential signaling – at least in my corner of the industry – and the longer I [...]

Design-for-test is a rapidly expanding task which is becoming more integrated with the design flow as time goes on. As I mentioned in my previous post, there are DFT-related tools spanning the range from RTL to the extreme back-end (which fall into the DFM category, IMHO). I thought I’d talk a little [...]