Archive for July 2007
You are browsing the archives of 2007 July.
You are browsing the archives of 2007 July.
If I may state the obvious, I am one guy, who has led one career, and therefore has a limited base of experience from which to draw. So when it comes to writing about Design-for-Test methodology and tools, those of you reading are getting a fairly narrow view of the wide world of DFT. [...]
I’m going to have to learn about and work on my spam management for this site… I guess it’s good that people can find my site, and the stats are increasing every month, but I’ve got to wonder just how much of the traffic is due to these spam-bots. Just lately, it seems I’m [...]
In my DAC and DFT – post #2, I linked to an article at Test & Measurement World, that briefly outlined a few different ‘new’ DFT technologies being pursued by the big EDA companies. One of these areas was termed volume diagnostics or defect diagnostics. This ‘new technology’, to me at least, is [...]
Although there is little in the way of Design for Test material there, just thought I’d mention Semicon West 2007, happening in a couple of weeks (July 16-20 at Moscone Center in San Francisco). The thrust is definitely aimed at the technology of test, which, for all you front-end designers, is the place where [...]
One of the areas of DFT development pointed out by Richard Quinnell of Test & Measurement World in his article entitled “Vendors pursue DFT strategies“, part of T&M’s DAC roundup, was test for ‘low-power designs’. Another term gaining traction for the process of coming up with these ‘low-power designs’ is ‘Power-Aware Design’. In [...]