DFT Digest

I love this: JL Gray of CoolVerification blogged about a recent experience, taking part in a roundtable discussion to be published in DACeZine (a fairly new on-line publication put out by the organizers of DAC). It’s unclear whether the discussion, titled “Changing communications channels within the electronics industry”, was intended to touch on traditional media vs. “blogging”, but JL comments that he hadn’t realized that even in the electronics industry, there is a bit of animus for the blogger species.

Running like scared monkeys, these journalists. I find their attitude amusing, given the fact that every major trade pub now has a blog section - what? If you can’t beat ‘em… Gabe Moretti has two blogs (Gabe on EDA, and EDA DesignLine). So what’s the beef? I read the trade pubs a lot. I blog about what I find interesting that touches those of us in design-for-test. But since I blog, my sources are questionable? Irony alert… trade pub journalists calling themselves questionable… If there’s anything that makes what they publish questionable, it’s the fact that most of it is generated by the marketing departments of EDA vendors, not “journalists”.

Here’s what I hope: in the nearest of possible futures, someone will figure out a new-world business model that will support independent industry coverage that over the years has been supplied by people like Goering, Santarini, Aycinena, Maniwa, and others. It shouldn’t have to be supported by EDA, just compelling enough to draw interest and consistent readership (and dare I say contribution) from the people they should be writing for: the engineers.

Just saw this over at DeepChip:

  Did you hear Mike Santarini of EDN just got laid off on Friday??

  This means the 3 biggest independents (Gartner/EETimes/EDN) that

  used to cover EDA have pretty much killed off their EDA coverage.

  Cadence stock is crashing.  Fewer young faces do chip design now.

  Are we watching the EDA industry collapsing in a self-inflicted

  implosion?  Is there a way out or should people working in EDA

  now start studying to pass the California realtor's license exam?

First Smith, then Goering, now Santarini? So where shall we find independent, in-depth coverage of EDA issues? Is it “every man for himself” when it comes to EDA tools? Maybe the EDA industry feels we’re all better off believing their press releases?

Believe me, DFT was/is rarely covered by any of these sources anyway,  but it seems to me to be a concern for the integrity of the industry as a whole.

What do you think?

Now let’s face it: Design for Manufacturing (DFM) is the hottest sector of the EDA industry. Everything else is, well, meh. From what I can gather, there are those who feel the sector of the future should be ESL, but it’s my opinion that true system-level design is many years out. Let designers get accustomed to SystemVerilog, I say. DFM, on the other hand is an immediate need. It cuts to the bottom line of profitability for every semiconductor company pursuing leading edge products. These are problems the industry needs to solve.

I started writing this post a few days ago, and let it lie as a near casualty in my recent fight with blogging burn-out. In the mean-time, John Busco wrote a post on Sramana Mitra’s contention that DFM/DFY provider PDF Solutions needs to find an eligible EDA company (or vice versa) for company nuptials. John wonders just how big the DFM sector can get, when it’s main customers are fabs and big IP providers. That’s a good point.

But I still contend that this sector is crucial to semiconductor companies, fabless or not. Very few chips, without it, will make it out of the fab alive. And that’s no way to run a chip business. So maybe Sramana is right - DFM/DFY companies need to be hooked up with EDA vendors as part of their portfolio. The business model should be different in that the actual benefactors (chip companies) will be using the tool, through the tool owner (the fab) - unless the chip company is big enough and pushes enough volume to warrant having their own tool. I rent my ski equipment, if you get the analogy.

So what does this have to do with Design-for Testability? I’ve mentioned a few times that DFT/Test are essential to a successful DFM strategy. It should be obvious - I mean, without a feedback mechanism, and data collection, how can yield be improved?

In a new article: DFT, ATE drive yield improvement, in T&M World written by Ajay Khoche of Verigy and Wu Yang of Mentor, the benefits and challenges of leveraging structural test results by linking them back to the design itself. The EDA industry is actively working to create these linkages - companies that provide yield analysis tools should be able to take scan failure data and attempt to automatically isolate the failing circuitry in the schematic, and ultimately, the layout. Yet another reason for DFM/DFY tools to be part of a EDA vendor’s portfolio, because, as of now, standard linkages are not yet in place.