Don’t Forget the Basics
In today’s 65nm and beyond world, DFT’ers are stretching their wings and flying into the land of new technologies such as test compression, at-speed scan, and newer fault models such as bridging faults. And it’s completely necessary. But don’t forget that no matter how you plan to trap more and different types of defects, you still have to cover the basics.
Think like a test engineer for a moment. Run through your standard test flow: continuity/shorts, power/ground shorts, input leakage, vil/vih, vol/voh… these are the old stand-by tests that all devices, great and small must pass.
And what does DFT have to do with these simple tests? Design for Test can make sure they ARE simple! OK, there’s not a lot you can do to facilitate a continuity/shorts test, or a pure input leakage test, for that matter.
“Ah, yes, but we have boundary scan!�? you say. All this can be taken care of with boundary scan. Well, yes and no. There is a 1149.6 standard that addresses LVDS, but let’s pretend for a second there isn’t. You still have to provide some simple access to device outputs so that the levels can be tested. NAND-tree, loop back modes, test-mode routing of inputs directly to outputs; any more ideas?
Getting bidirectional pins easily to their output state for levels, and to their input states for leakage. All important. Don’t forget the basics
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