DFT Digest

In the past there have been requests to address analog/Mixed-signal Design for Test on this blog.  I’ve tried to incite discussion on the subject a couple of times in previous posts (here and here) - limp efforts, at best. To be honest, I wasn’t able to come up with much beyond the mantra of all DFT engineers: maximize controllability and observability.  But that doesn’t mean there wasn’t plenty going on - just that I wasn’t paying attention.  Well, sort of.

At least one commenter to my posts dredged up the name Opmaxx; It’s the name of a company founded in the mid/late 90’s to create products for analog and mixed-signal ‘design centering’ and test automation.  I remember it because it came about just as I was getting more involved in DFT and starting to pay attention to the industry.  One of the products introduced by Opmaxx was called BISTMaxx; it inserted structures that subdivided any circuit into blocks that were then isolated during test mode and turned into oscillators.  The underlying concept is that faulty circuits would produce different oscillation frequencies than good circuits.  The general term for this method is called oscillation BIST.

I know of at least one instance (takes you to an article - scroll down to ‘Test Challenges’) where someone put this into their chips and into production.  Opmaxx was acquired by Fluence, then a subsidiary of Credence, was later absorbed into another Credence acquisition called IMS.  At one point, I believe they were selling BIST products for DACs, ADCs, VCOs and PLLs.  Eventually, at a time I’m unable to pinpoint, Credence dropped these products.  The industry was either not ready or unwilling to accept them, I guess.

However, still in the MS-DFT game was, and is, LogicVision.  I don’t know if they ever had ADC/DAC BIST, although Stephen Sunter (director of mixed-signal and parametric test at LogicVision) has presented papers regarding algorithms for implementing it.  They have had, and still do have A PLL BIST solution, and recently they have developed a SerDes BIST solution, based on undersampling, that claims to achieve sub-picosecond accuracy on any tester.  The SerDes BIST is based upon looping transmit data back through the receive channel, while varying certain parameters - thus being able to actually characterize the ‘eye’ of the signal…

…which brings me back to my term ‘Loopy’ in the title of this post.  Whether you’re testing a high-speed serial interface (like a SerDes), or analog conversion functions, by far the most common method is to loop back the data from one side to the other.  I’ve mentioned one case already; I just read of another case in the latest issue of IEEE Design & Test magazine, where authors from Texas Instruments and Georgia Institute of Technology describe a loop-back DFT method for VCO-based wireless tranceivers.  I’d link you to the ar

In either case, one consideration is apparent.  Usually some sort of signal conditioning and precise clocking is necessary between the transmitter and the receiver.  Take a DAC/ADC pair: the ultimate situation would be to create digital stimulus, convert to analog, transmit it, receive it, and compare for the correct response after it has been converted back into digital by the ADC.  Always faster to compare digital data than to analyze analog waveforms… However, due to imperfect data channels and clock skew, the recovered data can certainly be LSBs off by the time it gets back to the digital domain.  How this is mitigated depends upon the design.

These methods are seeing a resurgence, and they’re becoming standard issue for SoCs of the future.

Oh, and by the way, VLSI Test Symposium is coming up at the end of this month, in San Diego, CA.  If you’re interested in this subject, there is a tutorial on Thursday, May 1st, entitled, Practices in Analog, Mixed-signal and RF Testing

Check it out…