Book Review: VLSI Test Principles and Architectures
Forgive me, readers (assuming I have any), for I have sinned: it’s been over a week (almost 2) since my last post. I told myself and others that the right frequency for posting would be about 3-4 times a week, and I’ve been slacking – but it is the holidays, and if I may offer one more excuse: I’ve been doing more reading than writing.
I purchased and received my very own copy of VLSI Test Principles and Architectures, edited by Laung-Terng Wang, Cheng-Wen Wu and Xiaoqing Wen. It’s huge, just about 750 pages – 12 chapters covering pretty much all the aspects of DFT to one extent of the other.
Almost 30 people, from all the major DFT vendors and academia, contributed to this book. I recognize most of the names as long time contributors to the practice of design-for-test. As you can imagine, it turns out to be a very detailed and well informed volume of information. Topics covered include test generation, BIST (logic and memory), boundary scan and core test, test compression, and an excellent wrap up at the end covering the latest test technology trends.
I think there’s something here for every design for test practicioner. Most of us are not experts on everything DFT, and at some point or another will have to extend our knowledge of the craft. VLSI Test Principles is a great place to do that. It’s up-to-date, and detailed enough to provide a good understanding of any of several subjects in DFT. Beyond that it’s one of the most solid values in technical books I’ve ever seen – going for $56.95 at Amazon, when many technical books are well over $80-90…
I say it’s a steal.


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