DFT-in-the-news: 4/05/2009
The following are a selection of press releases from the first quarter of this year; I’ll follow up with more DFT in-the-news – beacause there is more to the industry than press releases!
LogicVision Delivers New Embedded Boundary Scan Core Reuse Capability
SAN JOSE, Calif. — April 2nd, 2009 — LogicVision, Inc. (NASDAQ: LGVN), a leading provider of semiconductor built-in-self-test (BIST) and diagnostic solutions, today announced a solution that will increase the ease and efficiency in reusing a growing number of cores containing embedded I/Os.
Wavecom accelerates wireless development with XJTAG
Cambridge, England, March 31, 2009 — Wavecom, a leading provider of embedded wireless technology for M2M (Machine to Machine) communication, has adopted the XJTAG IEEE Std. 1149.x boundary scan system as the platform for developing and testing its WMP100 Wireless Microprocessor-based turnkey systems.
Mentor and NXP Achieve Major Milestone in Silicon Test Partnership
WILSONVILLE, Ore., March 26, 2009 – Mentor Graphics Corporation (NASDAQ: MENT) today announced that Mentor and NXP have reached a major milestone in the IC manufacturing test and yield analysis partnership announced last April.
JTAG Production Programming for Texas Instruments’ Digital Signal Controllers
Bedford, United Kingdom – 25th March 2009. JTAG Technologies, the leading world-wide provider of boundary-scan products, has further broadened its in-system programming (ISP) support to include a number of popular DSCs (Digital Signal Controllers) from Texas Instruments.
XJTAG unveils XJFlash to speed boundary scan Flash memory programming
Cambridge, England, March 19, 2009 — XJTAG (www.xjtag.com), a leading global supplier of IEEE Std. 1149.x boundary scan development systems, has significantly improved the speed of Flash programming of its XJTAG boundary scan system with the introduction of XJFlash.
Synopsys Announces Yield Explorer – Design-Centric Yield Management for Product Engineering Teams
SAN JOSE, Calif., March 16 /PRNewswire-FirstCall/ — ISQED CONFERENCE — Synopsys, Inc. , a world leader in software and IP for semiconductor design and manufacturing, today introduced Yield Explorer, a new yield management product that expedites the discovery and mitigation of yield limiters in leading-edge integrated circuits.
LogicVision Announces Memory BIST & Repair Solutions for 45nm SOI Foundry Customers
SAN JOSE, Calif. — March 10, 2009 — LogicVision, Inc. (NASDAQ: LGVN), a leading provider of semiconductor built-in-self-test (BIST) and diagnostic solutions, today announced that IBM Corporation (NYSE: IBM) has included LogicVision’s ETMemory™ memory BIST and on-chip self-repair solution for embedded memory test and yield improvement within its advanced 45nm silicon-on-insulator (SOI) semiconductor foundry flow.
SAN JOSE, Calif. — Feb 26, 2009 — LogicVision, Inc. (NASDAQ: LGVN), a leading provider of semiconductor built-in-self-test (BIST) and diagnostic solutions, today announced that it has developed new technology that will enable easy access to chip level BIST capabilities for board and system-level test and maintenance activities.
JTAG ProVision a finalist for EDN’s Innovation Award
Stevensville, MD – February 19, 2009 – JTAG Technologies has been selected as a finalist for EDN Magazine’s prestigious Innovation Award for its revolutionary ProVision development tool suite.
XJTAG schedules another series of its ‘highly-rated’ free boundary scan workshops
Cambridge, England, February 11, 2009 — XJTAG, a leading global supplier of IEEE Std. 1149.x boundary scan development systems, has scheduled another series of its ‘highly-rated’ free ‘Introduction to boundary scan’ training workshops during February, March, April and May.
Mentor Graphics Announces MAJIC JTAG Probe Support for Sigma Designs Secure Media Processors
WILSONVILLE, Ore., February 5, 2009 – Mentor Graphics Corporation (NASDAQ: MENT) today announced its MAJIC® Series JTAG Probes now support Sigma Designs’ SMP8650 family of Secure Media Processors, including the SMP8654 and SMP8655.
Magma Licenses ATPG Technology to LogicVision
SAN JOSE, Calif., Feb. 5, 2009 – Magma Design Automation Inc. (Nasdaq: LAVA), a provider of chip design software, and LogicVision Inc. (Nasdaq: LGVN), a leading provider of semiconductor built-in-self-test (BIST) and diagnostic solutions, today announced Magma licensed its automatic test pattern generation (ATPG) technology to LogicVision.
Corelis Introduces a Highly Affordable Feature-Rich I2C Bus Analyzer
Cerritos, CA, February 4, 2009 – For the first time, system integrators and test engineers have access to an I2C analysis instrument that combines a rich set of features, ease-of-use, and an affordable price.
Boundary-scan leaps forward in ease-of-use and visualization
Stevensville, MD – Feb 4, 2009 – JTAG Technologies groundbreaking advances in the boundary-scan tool space continue with the latest release of its development and hardware debug tools, JTAG ProVision and Visualizer.
ASSET InterTech’s Woppman named one of only four finalists for “Innovator of the Year”
Richardson, TX (Feb. 2, 2009) – Editors at EDN Magazine, an influential publication for the electronic design industry, have selected Glenn Woppman, president and CEO of ASSET® InterTech, as one of four finalists in the 19th annual Innovator of the Year award competition.
ASSET Remote Instrumentation Controller named Best In Test Finalist for 2009
Richardson, TX (January 27, 2009) – The Remote Instrumentation Controller, Model 1000 (RIC-1000), from ASSET® InterTech (www.asset-intertech.com), the leading supplier of open tools for embedded instrumentation, has been named a finalist in Test and Measurement World magazine’s Best In Test awards program for 2009.
ASSET’s ScanWorks for Embedded Boundary Scan offers in-system JTAG test and diagnostics
Richardson, TX (Jan. 20, 2009) – The new ScanWorks® for Embedded Boundary Scan from ASSET® InterTech (www.asset-intertech.com), the leading supplier of open tools for embedded instrumentation, can be easily embedded in high-availability systems where it can apply system-level JTAG (SJTAG) test, diagnostic and programming algorithms.
Mentor Graphics DFT Tools Adopted by STMicroelectronics for Advanced IC Testing Solutions
WILSONVILLE, Ore., January 26, 2009 – Mentor Graphics Corporation (Nasdaq: MENT) today announced that STMicroelectronics has adopted the TestKompress® automatic test pattern generation (ATPG) product into its standard 65nm and 45nm design kits.
WILSONVILLE, Ore., January 27, 2009 – Mentor Graphics Corporation (NASDAQ: MENT) announced today it will supply Freescale Semiconductor (NYSE:FSL, FSL.B) with select electronic design automation (EDA) technologies designed to enhance the manufacturability and testability of semiconductors.
GSA Award Winner Tilera Selects LogicVision Memory BIST to Achieve Silicon Quality and Yield Goals
SAN JOSE, Calif. — Jan 23, 2009 — LogicVision, Inc. (NASDAQ: LGVN), a leading provider of semiconductor built-in-self-test (BIST) and diagnostic solutions, today announced that Tilera® Corporation, developer of the breakthrough TILE™ family of high-performance processors for the embedded market and the winner of the 2008 Global Semiconductor Alliance (GSA) “Start-up to Watch” award, has selected LogicVision’s memory BIST solution, ETMemory™, to help it meet its silicon manufacturing quality and yield goals.
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