DFT in-the-news – 9/14/08
A bit of catch-up here – a potpourri of news and press-releases from the last two weeks:
“International Test Conference, the highlight of the annual Test Week(TM) activities and the leading forum for electronics test technology, promises to engage and stimulate attendees from the test and design community with its technical program and activities when the doors open at the 39th annual ITC.”
ITC Announces Paper Awards for 2007 Conference
“R. Franch, P. Restle, N. James, W. Huott, J. Friedrich, R. Dixon, S. Weitzel, K. Van Goor, and G. Salem of IBM have been named the recipients of the coveted ITC Ned Kornfield Best Paper Award for their paper entitled, On-chip Timing Uncertainty Measurements on IBM Microprocessors.”
Corelis Headquarters Expansion Is Fueled By Increasing Demand For Its JTAG Products And Services
“Corelis Inc., a leading supplier of high-performance boundary-scan and JTAG functional emulation test tools, announced today the expansion of its existing facility by over 30% in order to effectively meet its clients’ demands for solutions to demanding new test requirements.”
SynTest Receives Two Fundamental Patents on Scan Compression
“On August 12, 2008, the U.S. Patent and Trademark Office (PTO) issued two patents (U.S. Patent No. 7,412,637 and U.S. Patent No. 7,412,672) to SynTest Technologies, Inc., a leading supplier of Design-for-Test (DFT) tools, for its groundbreaking inventions covering broadcasting scan patterns for reducing test data volume and test application time in Automatic Test Equipment (ATE) in a scan-based integrated circuit.”
ASSET brings JTAG test tools perspective to IEEE 1149.7
“ASSET® InterTech (www.asset-intertech.com), the leading supplier of open tools for embedded instrumentation, has assumed a principal role in the development of IEEE 1149.7 as one of the founding members of the working group that is defining the emerging standard, which will be ratified in early 2009.”
Flexible licensing gives global access to ASSET’s MicroMaster JTAG functional test system
“With its new licensing arrangement, the capabilities of ASSET® InterTech’s MicroMaster e-JTAG CPU emulation functional test and debug system can be flexibly deployed by global enterprises so that engineers have access to the system’s capabilities anywhere and at any time.”
“Intellitech Corporation, www.intellitech.com, the leader in lowering electronic product costs through IEEE 1149.X/JTAG, has announced the Mercury Remote Diagnostic Manager (MRDM) for production or burn-in test.”
IEEE 1149.7 Standard Cuts Space, Cost for Embedded Systems
“The IEEE working group for standard 1149 developed a two-pin compact test and debug solution to reduce strict pin-count, package size, and power constraints. Texas Instruments Inc. is driving ratification on IEEE 1149.7.”
JTAG Technologies supports wide range of Freescale controllers with embedded Flash
“JTAG Technologies, a leading provider of IEEE Std. 1149.x boundary-scan solutions for testing and programming printed circuit boards, now offers a family of programming tools for a large number of Freescale Semiconductor controllers with on-chip flash memory. The programmers all offer the convenience and efficiency of on-board programming, allowing blank controllers to be soldered on the PCBs for configuring later and as often as necessary.”
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