DFT Digest

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It may take me a couple of weeks to crawl through what I saw and heard in my 3-4 days at ITC this year – many of the articles written by the trade press have already (I’ll be linking to them as I see them). Likely by next week, you won’t see any more ITC stories. But you will here – DFT Digest – the gift that keeps on giving? he he… well one thing for sure, your not likely to find any personalized accounts in those stories as you will in mine. That’s what makes blogging fun!

Q: So what do steak, jugglers and analog fault models have in common?

DATE (Design, Automation & Test in Europe) 2009 started today. Is there someone out there that reads this blog that would like to report their DATE experience back to the world? If so, please let me know – I’ll give you a forum!

‘Tis true that the first purpose for a blog was to ‘log’ one’s finds on the internet – and I should remember this from time to time.  Earlier this month, there was an article posted in Design [...]

Wang, Laung-Terng, Charles E. Stroud, Nur A. Touba
System-on-Chip Test Architectures (Systems on Silicon)
Morgan Kaufmann- Nov, 2007

I’ve previously reviewed VLSI Test Principles and Architectures, edited by L.T. Wang, Chen-Wen Wu, and Xiaoqing Wen, and I’ve got to say, that book along with System-on-Chip Test Architectures, for the price, put an amazing of information at the fingertips of Design, Test and DFT engineers. I’ve said this before in DFT Digest, and I’ll say it again. For the most part, engineering and technical books are prohibitively expensive.

In the past there have been requests to address analog/Mixed-signal Design for Test on this blog.  I’ve tried to incite discussion on the subject a couple of times in previous posts (here and here) – limp efforts, [...]