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Book Review: System on Chip Test Architectures

Wang, Laung-Terng, Charles E. Stroud, Nur A. Touba
System-on-Chip Test Architectures (Systems on Silicon)
Morgan Kaufmann- Nov, 2007

I’ve previously reviewed VLSI Test Principles and Architectures, edited by L.T. Wang, Chen-Wen Wu, and Xiaoqing Wen, and I’ve got to say, that book along with System-on-Chip Test Architectures, for the price, put an amazing of information at the fingertips of Design, Test and DFT engineers. I’ve said this before in DFT Digest, and I’ll say it again. For the most part, engineering and technical books are prohibitively expensive.

Book Review - The Core Test Wrapper Handbook

System on Chip design involves gathering functions from various sources: different teams, different vendors, doesn’t matter - there’s never enough documentation. System on Chip test, especially as increasing amounts of functionality is embedded, can become an intractable problem very quickly.

Book Review: VLSI Test Principles and Architectures

I purchased and received my very own copy of VLSI Test Principles and Architectures, edited by Laung-Terng Wang, Cheng-Wen Wu and Xiaoqing Wen. It’s huge, just about 750 pages - 12 chapters covering pretty much all the aspects of DFT to one extent of the other.