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Core Test Again… More in IEEE D&T Magazine

I always look forward to getting my new IEEE Design & Test magazine. It seems to consistently contain great articles that bring out leading edge practices in IC design and test. And, refreshingly for me, mostly test. Design-for-test. Good stuff.

The May/June issue that just arrived in my mailbox this week did not disappoint – it was part 2 of the special issue on IEEE Std 1500 and Its Usage – I blogged about the first part in February: Get to the core of the matter – how will you test that core?.

Get to the core of the matter – how will you test that core?

Since the beginning of the electronics age, designers have been putting components together in interesting and useful ways; on boards, on chips, in packages, whatever gets the job done. A trend without end.

Among the more recent aspects of this trend are multi-core chips, multi-chip modules (MCM) and systems-in-package (SiP). The IP that comprises such a system may come from many sources, or may be developed internally, but as with any integration of functions, the DFT engineer’s challenge is always the same: how to test such a beast?

So much DFT – So little time…

Maintaining DFT Digest and DFT Forum is not that much work, but it’s not zero. Just this last week, we moved the DFT Forum from Siyad’s ISP to my server, and since then it seems like the spambots have found us. We’re getting a few new obviously bogus user registrations per day, and looking them up and deleting them is the kind of maintenance work I could do without. But read on…

Top 10 Things I Want to See at ITC

A week from today (Tuesday) the conference part of ITC Test Week starts. There are a lot of activities surrounding the whole event, and you can get a sense for whole deal if you peruse the ITC Advance Program. Since none of you readers offered up your to do lists for ITC next week, I guess it’s up to me – so without furthur ado, here are the Top 10 Things John Wants to Check Out at ITC 2008, Dave Letterman style…

Book Review – The Core Test Wrapper Handbook

System on Chip design involves gathering functions from various sources: different teams, different vendors, doesn’t matter – there’s never enough documentation. System on Chip test, especially as increasing amounts of functionality is embedded, can become an intractable problem very quickly.