Archive for JTAG
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You are browsing the archives of JTAG.
Remember in my last post, where I told you how weird it was to suddenly be seeing all these references to 3D ID design technology? Well it didn’t stop. Literally, the day I posted that entry, I got the new issue of IEEE Design & Test – a special issue on, you guessed it: 3D IC Design and Test.
The same day, I was cleaning my desk, and found a couple of papers that I had printed out a couple of months ago and forgot about, from DATE ‘09. One was entitled Test Architecture and Optimization for Three-Dimensional SoC’s.
Sometimes a post just begs to be written. Subconsciously, little reminders crop up in your input stream (a.k.a. eyes and ears) that prod you into doing something. Last week, like a Hitchcock blonde, it seemed like every time I turned around, something referring to 3-D technology popped out at me. I think it started when I began searching for material on JTAG implementations for MCMs…
Wow, it’s been so long since I done “in-the-news”, this might get to be a long post… the DFT world moves on whether I have time to document it or not!
The following are a selection of press releases from the first quarter of this year; I’ll follow up with more DFT in-the-news – beacause there is more to the industry than press releases!
Every once in awhile, I’ll trip on a new design-for-test website or blog that seems interesting or useful, seemingly just for the sake of being useful. Granted, sometimes these sites are just communication channels for a particular EDA vendor, but sometimes that doesn’t matter. Sometimes it’s just something that an ‘enthusiast’ starts up.
I’m not sure which is the case of a blog I found a few weeks back, simply called JTAG JTAG blog provides you with a informational resource on JTAG products, boundary scan testing, and the latest news on JTAG.“, says the tagline.
Santa Clara, California – International Test Conference – October 30th, 2008 – Intellitech Corporation, www.intellitech.com, the leader in lowering electronic product costs through IEEE 1149.1/JTAG, has announced UltraTAP-BT, a Bluetooth enabled IEEE 1149.1/JTAG pod with non-volatile test program and failure memory.