Archive for multi-core

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Get to the core of the matter – how will you test that core?

Since the beginning of the electronics age, designers have been putting components together in interesting and useful ways; on boards, on chips, in packages, whatever gets the job done. A trend without end.

Among the more recent aspects of this trend are multi-core chips, multi-chip modules (MCM) and systems-in-package (SiP). The IP that comprises such a system may come from many sources, or may be developed internally, but as with any integration of functions, the DFT engineer’s challenge is always the same: how to test such a beast?

Design-for-Test in 2009

It’s that time of year again: goodbye 2008, hello 2009. How fun for me, the presumptive lonely voice in this quiet little corner of the EDA wilderness, design-for-test, right? BTW, today marks 3 years of DFT Digest -readership grew 50-100% this year, depending upon which numbers you’re looking at. Not bad – hopefully you’ll continue to read, and I’ll continue to compel you.

The rest of the industry talks about ESL, dead DFM companies, the next killer engineering app (energy), white-spaces, and the battle of the PU’s (CPU vs GPU); what’s happening in DFT?